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| RF6100-1 0 Typical Applications * 3V CDMA/AMPS Cellular Handset * 3V CDMA20001/X Cellular Handset * Spread-Spectrum System 3V 900MHZ LINEAR POWER AMPLIFIER MODULE Product Description The RF6100-1 is a high-power, high-efficiency linear amplifier module specifically designed for 3V handheld systems. The device is manufactured on an advanced third generation GaAs HBT process, and was designed for use as the final RF amplifier in 3V IS-95/CDMA 2000 1X/AMPS handheld digital cellular equipment, spreadspectrum systems, and other applications in the 824MHz to 849MHz band. The RF6100-1 has a digital control line for low power applications to lower quiescent current. The device is self-contained with 50 input and output that is matched to obtain optimum power, efficiency and linearity. The module is a 4mmx4mm land grid array with backside ground. The RF6100-1 is footprint compatible with industry standard 4mmx4mm CDMA modules, and requires only one decoupling capacitor. Optimum Technology Matching(R) Applied Si BJT Si Bi-CMOS InGaP/HBT GaAs HBT SiGe HBT GaN HEMT GaAs MESFET Si CMOS SiGe Bi-CMOS 1 4.00 0.10 1.40 1.25 4.00 0.10 0.450 0.075 0.500 TYP 0.600 TYP 2.975 R0.20 TYP 1 3.900 TYP 2.425 2.200 1.800 1.525 1.350 0.950 0.500 TYP 0.100 TYP 0.000 3.549 3.500 3.050 2.650 2.400 TYP 2.200 1.800 1.650 1.350 0.950 0.725 0.125 Package Style: Module (4mmx4mm) Features * Input/Output Internally Matched@50 * 28dBm Linear Output Power * 40% Peak Linear Efficiency * -50dBc ACPR @ 885kHz VREG 1 VMODE 2 GND 3 RF IN 4 VCC1 5 Bias 10 GND 9 GND 8 RF OUT 7 GND 6 VCC2 * 29dB Linear Gain * 53% AMPS Efficiency Ordering Information RF6100-1 3V 900MHz Linear Power Amplifier Module RF6100-1 PCBA Fully Assembled Evaluation Board Functional Block Diagram RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA 3.000 TYP 3.200 3.500 TYP 3.900 TYP 0.000 0.775 1.000 TYP Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com Rev A0 031219 2-689 RF6100-1 Absolute Maximum Ratings Parameter Supply Voltage (RF off) Supply Voltage (POUT 31dBm) Control Voltage (VREG) Input RF Power Mode Voltage (VMODE) Operating Temperature Storage Temperature Rating +8.0 +5.2 +4.2 +10 +3.5 -30 to +110 -40 to +150 Unit V V V dBm V C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter High Power Mode (VMODE Low) Operating Frequency Range Linear Gain Second Harmonics Third Harmonics Maximum Linear Output Linear Efficiency Maximum ICC ACPR @ 885kHz ACPR @ 1.98MHz Input VSWR Stability in Band Stability out of Band Noise Power Specification Min. Typ. Max. Unit Condition T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =28dBm for all parameters (unless otherwise specified). 824 27 849 29 -35 -40 40 465 -50 -58 2:1 MHz dB dBc dBc % mA dBc dBc No oscillation>-70dBc No damage At 45MHz offset. T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =2.8V, and POUT =18dBm for all parameters (unless otherwise specified). 28 35 530 -46 -55 6:1 10:1 -133 dBm/Hz Low Power Mode (VMODE High) Operating Frequency Range Linear Gain Second Harmonics Third Harmonics Maximum Linear Output Maximum ICC ACPR @885kHz ACPR @1.98MHz Input VSWR Output VSWR Stability 824 24 849 26 -35 -40 135 -50 -60 2:1 MHz dB dBc dBc mA dBc dBc 18 POUT =16dBm -46 -56 6:1 10:1 No oscillation>-70dBc No damage 2-690 Rev A0 031219 RF6100-1 Parameter FM Mode Operating Frequency Range AMPS Maximum Output Power AMPS Efficiency AMPS Gain AMPS Second Harmonics AMPS Third Harmonics 824 47 24 31 53 28 -35 -40 3.4 65 55 4.7 250 849 MHz dBm % dBc dBc V mA mA mA uA uS uS uA V V V V V High Gain Mode Low Gain Mode Specification Min. Typ. Max. Unit Condition T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =31dBm for all parameters (unless otherwise specified). -30 -30 4.2 100 70 5.5 1000 6 40 5.0 0.5 2.95 3.0 0.5 2.8 Power Supply Supply Voltage High Gain Idle Current Low Gain Idle Current VREG Current VMODE Current RF Turn On/Off Time DC Turn On/Off Time Total Current (Power Down) VREG Low Voltage VREG High Voltage (Recommended) VREG High Voltage (Operational) VMODE Voltage 3.2 VMODE =low and VREG =2.8V VMODE =high and VREG =2.8V VMODE =high 0.2 0 2.75 2.7 0 2.0 2.8 Rev A0 031219 2-691 RF6100-1 Pin 1 2 3 4 5 6 7 8 9 10 Pkg Base Function VREG VMODE GND RF IN VCC1 VCC2 GND RF OUT GND GND GND Description Regulated voltage supply for amplifier bias. In Power Down mode, both VREG and VMODE need to be LOW (<0.5V). For nominal operation (High Power Mode), VMODE is set LOW. When set HIGH, devices are biased lower to improve efficiency. Ground connection. Connect to package base ground. For best performance, keep traces physically short and connect immediately to ground plane. RF input internally matched to 50. This input is internally AC-coupled. First stage collector supply. A low frequency decoupling capacitor (e.g., 4.7F) may be required. Output stage collector supply. A low frequency decoupling capacitor (e.g., 4.7F) is required. Ground connection. Connect to package base ground. For best performance, keep traces physically short and connect immediately to ground plane. RF output internally matched to 50. This output is internally AC-coupled. Ground connection. Connect to package base ground. For best performance, keep traces physically short and connect immediately to ground plane. Ground connection. Connect to package base ground. For best performance, keep traces physically short and connect immediately to ground plane. Ground connection. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground plane. Interface Schematic 2-692 Rev A0 031219 RF6100-1 Evaluation Board Schematic (Download Bill of Materials from www.rfmd.com.) VREG C3 4.7 F VMODE C4 4.7 F J1 RF IN VCC1 C2 4.7 F 50 strip 1 2 3 4 5 P1 1 P1-2 2 3 P1-4 4 P2 1 2 P2-3 3 4 P2-5 Bias 10 9 50 strip 8 7 6 C1 22 F VCC2 J2 RF OUT GND VCC1 GND VCC2 GND GND VREG GND GND 5 CON5 VMODE 5 CON5 Rev A0 031219 2-693 RF6100-1 PCB Design Requirements PCB Surface Finish The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3inch to 8inch gold over 180inch nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land and Solder Mask Pattern 3.60 (mm) Typ. A = 0.40 (mm) Sq. Typ. Pin 1 A = 0.55 (mm) Sq. Typ. B = 2.65 x 3.95 (mm) 3.60 (mm) 2.35 (mm) Pin 1 3.40 (mm) 2.55 (mm) 1.70 (mm) Typ. 0.85 (mm) Typ. 0.00 A A A A A A A 3.40 (mm) Typ. 2.55 (mm) Typ. 1.70 (mm) Typ. A A A A A B A A A A A 1.05 (mm) 0.65 (mm) 0.85 (mm) Typ. 0.00 0.00 0.45 (mm) 2.95 (mm) Typ. 3.40 (mm) Typ. Metal Land Pattern Solder Mask Pattern Figure 1. PCB Metal Land and Solder Mask Pattern (Top View) Thermal Pad and Via Design The PCB metal land pattern has been designed with a thermal pad that matches the exposed die paddle size on the bottom of the device. Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies. The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a 0.5mm to 1.2mm grid pattern with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results. 2-694 1.70 (mm) 0.00 Rev A0 031219 |
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